The technical field relates to an atomic resolution storage (ARS) system, and, in particular, to process flow for the ARS system using selenidation wafer bonding.
An ARS system provides a thumbnail-size device with storage densities greater than one terabit (1,000 gigabits) per square inch. The ARS technology builds on advances in atomic probe microscopy, in which a probe field emitter tip as small as a single atom scans the surface of a material to produce images accurate within a few nanometers. Probe storage technology may employ an array of atom-size probe field emitter tips to read and write data to spots on storage media.
An ARS system typically includes three bonded silicon (Si) wafers, i.e., a tip wafer, also known as an emitter wafer, a rotor wafer, also known as a mover wafer, and a stator wafer. The wafers are bonded together using wafer bonding techniques, which are well known in the art.
For the ARS system to operate, the rotor wafer and the stator wafer need to be processed by depositing conductive electrodes for nanometer precise position controls. FIGS. 1(a)-1(f) show a prior art process flow for an ARS system 100.
Referring to FIG. 1(a), a stator side (bottom side) of the rotor wafer 120(shown upside down in FIG. 1(a)) is processed first by depositing conductive electrodes 134(a), such as titanium/titanium-nitride (Ti/TiN) electrodes, on the stator side of the rotor wafer 120. A polycrystalline silicon (Poly Si) layer 102 and an insulating layer 104(a), such as an insulating silicon oxide (SiO2) layer, is also deposited on the stator side of the rotor wafer 120. The Poly Si 102 is a typical form of Si that is deposited on a wafer, and may be xe2x80x9cdopedxe2x80x9d to make the Si more conductive. At this point, the rotor wafer 120 is approximately 600 microns in thickness.
Referring to FIG. 1(b), CMOS circuitry 132 is formed in the stator wafer 130, followed by processing a rotor side of the stator wafer 130 with a conductive layer of electrodes 134(b), such as conductive Ti/TiN electrodes, an insulating layer 104(b), such as an insulating SiO2 layer, and a silicon nitride (Si3N4) layer 106. The Si3N4 106 may be used as an alternative insulating (dielectric) layer.
FIG. 1(c) shows subsequent bonding of the rotor wafer 120 and the stator wafer 130. Because the tip wafer (not shown) and the stator wafer 130 are normally 500-600 microns, the rotor wafer 120 may need to be trenched to, for example, approximately 100 microns in thickness after the bonding. The rotor wafer 120 is typically grinded on the media side using a wafer grinding machine.
However, the intense processing and grinding of the rotor wafer 120 may cause damage, such as stress, dislocations, mechanical twins, stacking faults, and incorporations of impurities on the wafer surface. Grinding is typically followed by a process referred to as chemical mechanical polishing (CMP), which removes another 1 micron to 5 microns of the Si wafer in a more xe2x80x9cgentlexe2x80x9d process that leaves the wafer surface with less damage.
FIG. 1(d) shows metallization of the media side of the rotor wafer 120 by depositing conductive electrodes 134(c), such as conductive Ti/TiN electrodes, for routing electrical signals and driving the rotor wafer 120. An insulating layer 104(c), such as an insulating SiO2 layer, maybe coated beneath or over the conductive electrodes 134(c) on the media side of the rotor wafer 120 for electrical insulation and surface protection.
Referring to FIG. 1(e), suspension springs are formed by deep Si etching. First, a masking layer 150, such as a photoresist (PR) film layer, may be deposited over the conductive electrodes 134(c) on the media side of the rotor wafer 120. A predetermined portion of the masking layer 150 has been etched so that the potion of the rotor wafer 120 corresponding to the etched portion of the masking layer 150 is exposed. Next, the exposed potion of the rotor wafer 120 is removed by deep Si etching using the masking layer 150 as a mask, forming the suspension springs.
FIG. 1(f) shows the final steps of ARS system 100 processing, etching the insulating SiO2 layer 104(c) with the mask, removing the masking PR layer 150, and laser dicing, which is a technique to cut a wafer into individual rectangular devices, i.e., dices, with a computer guided laser.
Following the series steps of wafer processing, the surface 160 for ARS storage media, which includes the conductive electrodes 134(c), is formed and may conduct with electronics in the tip wafer for the read/write operations.
However, the above described process flow for ARS system 100 has the following drawbacks. First, the surface 160 for the ARS storage media may be easily damaged by the thinning process, i.e., the grinding and CMP.
In addition, the CMOS circuitry 132, which controls the overall system operation including data input and output, is very sensitive to heat. Because the CMOS circuitry 132 is formed in the stator wafer 130 before other structures are formed and processed, the prior art process flow has tight thermal budget problem, i.e., the wafers cannot be processed with high temperature.
Similarly, due to the subsequent processing of the media side of the rotor wafer 120 and other processing steps, there may be higher probability of degradation of wafer bonding between the rotor wafer 120 and the stator wafer 130.
Higher probability of damage to the CMOS circuitry 132 after formation due to thermal processing, combined with degradation of wafer boning due to subsequent processing, may lead to decreased yield, which represents a number of correctly functioning devices on a wafer at the completion of mover processing, and higher manufacturing cost.
A method for processing an ARS system includes depositing a protective layer on a first side, such as a media side, of a first wafer, such as a rotor wafer. The method further includes bonding the rotor wafer with a handle wafer, thinning the rotor wafer at a stator side of the rotor wafer, processing a stator wafer, bonding the rotor wafer and the stator wafer, detaching the handle wafer, and processing the media side of the rotor wafer by depositing conductive electrodes on the media side of the rotor wafer.
An embodiment of the method for processing the ARS system further includes forming suspension springs by patterning the protective layer, selectively etching the protective layer, and selectively deep Si etching the rotor wafer using the protective layer as a mask.
Another embodiment of the method for processing the ARS system further includes forming complementary metal oxide semiconductor (CMOS) CMOS circuitry in the second wafer, removing the protective layer, and laser dicing.
The improved process flow for the ARS system deposits the conductive electrodes on the media side of the rotor wafer before wafer thinning process, i.e., grinding and CMP, thus protecting the conductive electrodes on the media surface from the grinding process. In addition, the CMOS circuitry is formed in the stator wafer at a relatively later stage. Therefore, the CMOS circuitry is less likely to be damaged by heat processing. In addition, some of the necessary processing may be performed with loosened thermal budget. Finally, because the wafer bonding of the rotor wafer and the stator wafer is performed at a later stage, there is less probability of degradation of the wafer bonding. Accordingly, device yield may be enhanced, leading to lower manufacturer cost.